The present invention relates to a manufacturing method for a crystalline semiconductor material wherein an amorphous or polycrystalline semiconductor layer is heated for crystallization, and also to a manufacturing method for a semiconductor device using the above manufacturing method for the crystalline semiconductor material.
In recent years, attention has been paid to a technique of forming a semiconductor thin film on a substrate of an amorphous dielectric material such as a glass material or plastic material and fabricating a semiconductor element such as a thin-film transistor (TFT) by using this semiconductor thin film. In actual, such a technique is applied to a switching element, drive circuit, and the like for each pixel in a liquid crystal display. Further, for a higher scale of integration and multifunctionality of a semiconductor device, research and development are being pursued on a three- dimensional integrated circuit or the like wherein such semiconductor elements as mentioned above are layered on the substrate.
In the case of a TFT, a polycrystalline silicon (Si) thin film formed on the substrate mentioned above is frequently used as an operating region (channel region). A conventional forming method for a polycrystalline silicon thin film includes the steps of forming an amorphous silicon thin film on a dielectric substrate, directing a laser beam to the amorphous silicon thin film to melt and crystallize it. This method has been developed as laser annealing and put to practical use. To uniform the device characteristics of TFTs using such a polycrystalline silicon thin film, it is preferable to make the sizes or plane orientations of crystal grains in the polycrystalline silicon thin film as uniform as possible.
In this conventional method, however, it is impossible to control the position or size of each crystal grain. Further, grain boundaries are randomly present in the polycrystalline silicon thin film formed, and the plane orientations of the crystal grains are different from each other. Accordingly, the device characteristics, reliability, and uniformity of semiconductor elements such as TFTs using a polycrystalline silicon film are considerably inferior to those of semiconductor elements using single-crystal silicon.
Disclosed in Japanese Patent No. 3344418 is a technique of increasing the size of each crystal grain by using a resist pattern having gentle steps to etch an amorphous silicon film, thereby forming unevennesses on the amorphous silicon film, and next directing a laser beam to the amorphous silicon film. However, this method is complicated because the gentle steps must be formed on a resist. Further, the unevennesses formed on the amorphous silicon film are transferred to a polycrystalline silicon film, causing a degradation in planarity. As a result, there is a possibility of adverse effect on the characteristics of semiconductor elements formed by using this polycrystalline silicon film.